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[Other resource] Viterbidecoder

Description: 维特比解码器低功耗设计verilog编码完整的程序可直接用-Viterbi decoder low power design Verilog coding complete procedures can be used directly
Platform: | Size: 386457 | Author: 杨艺 | Hits:

[Embeded-SCM Develop] viterbi_decoder_sources_code_verilog

Description: viterbi decoder , use verilog HDL language.-Viterbi decoder, use verilog HDL language.
Platform: | Size: 44082 | Author: 林四昆 | Hits:

[VHDL-FPGA-Verilog] Viterbidecoder

Description: 维特比解码器低功耗设计verilog编码完整的程序可直接用-Viterbi decoder low power design Verilog coding complete procedures can be used directly
Platform: | Size: 386048 | Author: 杨艺 | Hits:

[Embeded-SCM Develop] viterbi_decoder_sources_code_verilog

Description: viterbi decoder , use verilog HDL language.-Viterbi decoder, use verilog HDL language.
Platform: | Size: 44032 | Author: 林四昆 | Hits:

[VHDL-FPGA-Verilog] viterbi

Description: 介绍了viterbi译码器的编解码器的设计，包括decoder.v,encoder.v.control.v,ram.v等，压缩包里面有pdf说明-Introduced a viterbi decoder codec design, including decoder.v, encoder.v.control.v, ram.v and so on, there are pdf compression package description
Platform: | Size: 62464 | Author: yaoyongshi | Hits:

[Program doc] _2_1_7_viterbidecoder

Description: 基于MATLAB的2_1_7_维特比译码器的并行算法实现-MATLAB-based Viterbi decoder 2_1_7_ parallel algorithm
Platform: | Size: 311296 | Author: 罗青锋 | Hits:

[Windows Mobile] viterbi

Description: viterbi encoder and decoder modeling verilog
Platform: | Size: 6144 | Author: glory | Hits:

[VHDL-FPGA-Verilog] viterbi

Description: verilog程序，实现了（2，1，4）卷积码编码，和基于回溯算法的维特比译码器-verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder
Platform: | Size: 3072 | Author: xiongherui | Hits:

[VHDL-FPGA-Verilog] Viterbi_decoder

Description: Viterbi译码器的编解码器的设计用Verilog实现-Viterbi decoder。Verilog
Platform: | Size: 64512 | Author: 李风飞 | Hits:

[VHDL-FPGA-Verilog] viterbidecoder

Description: viterbi译码器的Verilog实现,(3,1,7)零尾卷积码-viterbi decoder implementation by verilog HDL （3，1，7）zero tail conventional code
Platform: | Size: 5120 | Author: zhouli | Hits:

[VHDL-FPGA-Verilog] viterbi_for_bch

Description: Viterbi based trellis decoder for (7,4) - binary BCH code-Viterbi based trellis decoder for (7,4)- binary BCH code
Platform: | Size: 1024 | Author: shahifaqeer | Hits:

[VHDL-FPGA-Verilog] viterbi

Description: verilog code for viterbi encoder and decoder
Platform: | Size: 13312 | Author: kamran | Hits:

[VHDL-FPGA-Verilog] viterbi.decoder

Description:
Platform: | Size: 11264 | Author: thang | Hits:

[VHDL-FPGA-Verilog] Control

Description: 维特比译码器控制器部分Verilog代码-The controller part of the Viterbi decoder in Verilog code
Platform: | Size: 1024 | Author: 王阳 | Hits:

[VHDL-FPGA-Verilog] Viterbi_Verilog

Description: viterbi译码的verilog实现,提供相应的原程序代码和testbench -viterbi decoder verilog implementation
Platform: | Size: 3756032 | Author: ren | Hits:

[VHDL-FPGA-Verilog] viterbi_decoder_axi4s

Description: Viterbi译码器的verilog代码和测试-Verilog code and testing of the Viterbi decoder
Platform: | Size: 18925568 | Author: 李雪利 | Hits:

[Post-TeleCom sofeware systems] newViterbi217

Description: 基于IEEE802.11n标准,采用verilog语言设计的(2,1,7)卷积码viterbi译码器,支持1/2,2/3,3/4,5/6四种码率的译码,以测试无误-IEEE802.11n standard Verilog language design (2,1,7) convolutional code viterbi decoder support 1/2, 2/3, 3/4, 5/6 four bit rate decoding to test and correct
Platform: | Size: 18432 | Author: logic | Hits:

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[Other resource] Viterbidecoder

[Embeded-SCM Develop] viterbi_decoder_sources_code_verilog

[VHDL-FPGA-Verilog] Viterbidecoder

[Embeded-SCM Develop] viterbi_decoder_sources_code_verilog

[VHDL-FPGA-Verilog] viterbi

[Program doc] _2_1_7_viterbidecoder

[Windows Mobile] viterbi

[VHDL-FPGA-Verilog] viterbi

[VHDL-FPGA-Verilog] Viterbi_decoder

[VHDL-FPGA-Verilog] viterbidecoder

[VHDL-FPGA-Verilog] viterbi_for_bch

[VHDL-FPGA-Verilog] viterbi

[VHDL-FPGA-Verilog] viterbi.decoder

[VHDL-FPGA-Verilog] Control

[VHDL-FPGA-Verilog] Viterbi_Verilog

[VHDL-FPGA-Verilog] viterbi_decoder_axi4s

[Post-TeleCom sofeware systems] newViterbi217

[VHDL-FPGA-Verilog] Enc_With_Punc---2011-11-28-v3.0

[VHDL-FPGA-Verilog] viterbi-decoder-verilog

[Software Engineering] verilog

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